Host SPI Configuration

This section describes the SPI parameter requirements for Qwantum ASIC. The SPI interface in the microcontroller should be configured properly to communicate with the ASIC.

• Mode of Operation (Master/Slave)

• Clock Polarity – the inactive state of the Serial Communications Clock (SCLK).

• Clock Phase – which edge of SCLK causes data to change and which edge causes data to be captured.

• Frame Size (8-bit or 16-bit) – the number of bits transferred per frame.

• Byte Transfer Order – specifies whether the LSB or MSB of the frame should be transferred first.

• SPI Serial Clock.

• Baud rate.

• Interrupt between SPI controller and Peripheral.

• SPI Peripheral Chip Select

Mode of Operation

The Qwantum ASIC has two ways of communicating with a host microcontroller: Data Strobe mode and SPI mode. Two GPIO pins can be used for the data strobe mode. For the Qwantum SPI mode, the SPI module in microcontroller should be initialized and configured to operate as an SPI master.

The operation mode to be used is selected by hardware (the voltage on the MODE pin). When the MODE pin is tied to VDD voltage, the ASIC becomes an SPI slave and communicates via the SPI slave communication interface. When the MODE pin is tied to ground, the ASIC operates in the data strobe mode and communicates via two GPIO pins. The MODE pin is not intended to toggle while the ASIC is operating.

Clock Polarity and Clock Phase

SPI is a synchronous communication protocol clocked by SCLK which is driven by the SPI master. Qwantum ASIC requires SCLK to be idle low. So, the master should be configured to be inactive when SCLK is low.

Clock Phase indicates which edge of SCLK causes data to change and which edge causes data to be captured. Qwantum ASIC requires data to be changed on the rising edge of clock and sampled on the negative edge of clock. This corresponds to the common labeling of CKPOL=0 and CKPHA=1.

Frame Size (SPI Character/Word Length)

The size of a data packet for Qwantum ASIC is 16-bit. Thus, the frame size of the SPI master should be configured for 16-bit.

Byte Transfer Order

Qwantum ASIC transfers MSB of data first. Thus, the SPI master should be configured to support the MSB transfer first during the data transfer. If the SPI master doesn’t support the MSB transfer first option, firmware may need to swap bytes after receiving it from the ASIC.

SPI Serial Clock and Baud Rate

The microcontroller master clock and SPI module clock should be enabled. The way the SPI baud rate is computed is different for different microcontroller manufacturers and models.

Interrupt

Qwantum ASIC can operate with or without interrupt in SPI mode. When the ASIC uses interrupt, it can generate two separate interrupts in sequence, Card Present Interrupt followed by Card Data Available Interrupt, or Card Data Available Interrupt only depending upon how the ASIC is configured in firmware. The microcontroller and the ASIC (IRQ_DIS bit in Configuration Register (address = 0x00)) should be configured properly to use the interrupt feature of the ASIC.

SPI Peripheral Chip Select

The SSELn pin on Qwantum ASIC should be connected to the SPI chip select pin on the microcontroller. The ASIC should be selected only when the microcontroller firmware needs to communicate with the ASIC and released after it finishes reading or writing the ASIC registers.

SPI Interface Functions

This section provides examples of common functions required for the microcontroller SPI interface. Each function depends on driver APIs available in the microcontroller firmware.

The examples can be found in the reference code: spi_app.c and spi_hal.c.

Initialization/Configuration of SPI Interface

This function should configure the SPI related pins and SPI interface parameters in the microcontroller described in Section 2.1 ~ 2.7. The Qwantum ASIC initialization and the microcontroller interrupt enable routine, if interrupt is used, should be invoked in this function.

SPI Data Receive

This function reads 16-bit data from an SPI slave device.

SPI Data Transmit

This function writes 16-bit data to an SPI slave device.